A multilayer wiring structure in a semiconductor device is formed by burying a metal wiring in an interlayer insulating film. Cu (copper) is used as a material for this metal wiring because of low electromigration and low resistance, and a damascene process is generally used as a forming process thereof.
In this damascene process, a trench for burying a wiring, which will be arranged inside a layer, and a via hole for burying a connection wiring for connecting upper and lower wirings are formed in an interlayer insulating film of a substrate, and Cu is buried in these recesses by a CVD method, an electroplating method or the like. In the case of using the CVD method, in order to favorably bury Cu, it is necessary to form a very thin Cu seed layer along the surface of the interlayer insulating film and the inner surface of the recess. In the case of using the electroplating method, it is also necessary to form on the recess a Cu seed layer serving as an electrode. Further, since Cu is easily diffused into the insulating layer, it is necessary to form a barrier film including, e.g., a laminated body of Ta/TaN, on the recess. Accordingly, the barrier film and the Cu seed layer are formed on the surface of the insulating film and the inner surface of the recess by, e.g., a sputtering method.
The miniaturization of a wiring pattern has been progressing, so that it is necessary for the barrier film and the seed layer to be thinner. However, if the ratio of the depth of the recess to its width increases, when the barrier film and the seed layer are formed, the metal forming them is formed thickly around the opening of the recess compared to the deep portion of the recess. Thus, it is difficult to form in the recess the barrier film and the seed layer with high uniformity. As a consequence, the reliability against a barrier property or the adhesivity of an interface with the seed layer becomes a problem.
Based on such background, Patent Document 1 discloses a method for forming an alloy layer of Cu and an additive metal, e.g., Mn (manganese), along a surface of a recess of an insulating film, burying Cu as a wiring material in the recess by using the alloy layer as a seed layer, and forming a barrier film by performing an annealing process under an oxygen atmosphere by using a furnace.
The following is detailed description of the state of the alloy layer in the case of performing the annealing process. Mn in the alloy diffuses in the alloy and Cu, and a part of Mn moves to the surface of the interlayer insulating film as if it is separated from Cu. Mn remaining on the surface of the interlayer insulating film reacts with O(oxygen) attached to the surface of the interlayer insulating film, thereby forming a barrier film made of MnxOy as an oxide (x and y being natural numbers, hereinafter, simply referred to as “MnO”) that is an extremely stable compound. The excessive Mn which has not been used in the formation of the barrier film moves to the surface side of the alloy film (the opposite side of the interlayer insulating film) and then to the surface of Cu buried in the recess, and is segregated on the surface of Cu. The Mn segregated on the surface of Cu is removed by a post-process. The self-forming barrier film made of MnO thus formed is uniform and extremely thin, and thus contributes to solve the above-described problem.
Further, it is also considered that the Mn which has moved to the surface of the interlayer insulating film reacts with O or Si as constituent elements of the interlayer insulating film, thereby forming a self-forming barrier film made of MnSixOy (x and y being natural numbers). The study thereof is being developed.
Meanwhile, before a CuMn film is formed, a Cu wiring (lower layer wiring) to be electrically connected to a Cu wiring (upper layer wiring) to be buried in a recess is exposed at a bottom portion of the recess of the interlayer insulating film. The exposed lower layer wiring may be oxidized into Cu2O or CuO by oxygen existing in the atmospheric atmosphere. Hereinafter, the Cu oxides will be simply referred to as CuO. If a CuMn film is formed in that state, Mn in the CuMn film reacts with oxygen in CuO and is oxidized into MnO because of its oxidative tendency higher than that of Cu. As described above, MnO is a stable compound and is passive, and thus does not move in Cu in an annealing process performed after the burying of Cu. Moreover, MnO has high resistance, so that the resistance (via contact resistance) between the upper layer wiring and the lower layer wiring increases, and this may deteriorate the reliability of the Cu wiring.
In the prior art, the CuMn film is formed by, e.g., a sputtering method. However, in order to cope with future trends toward extreme miniaturization of a wiring pattern, it is being studied to form a CuMn film by a CVD method which ensures high coatability and buriability to a recess. In the case of using the sputtering method, CuO exposed to the recess is etched and removed by ions in the plasma. In the case of using the CVD method, however, CuO is not etched. Thus, a more amount of MnO is generated, and an excessive MnO may remain in the wiring.
Patent Document 1: Japanese Patent Laid-open Publication No. 2005-277390 (paragraphs 0042-0045, FIG. 7)